Logic Verification Jobs

Explore 2 active Logic Verification job openings aggregated from hundreds of sources. Roles range from entry-level to executive, remote and on-site, refreshed hourly.

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(Sr.) ISP RTL Design Manager

OMNIVISION Singapore SG 6 months ago

Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performa...

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