Staff Digital IC Design Engineer

900.00 - 1140.00

Job description

Overview RTL-level digital design and problem solving Function verification and support Work closely with backend team on Digital synthesis, place-and-route, Design for Test and Static timing analysis Lead and guide junior engineers Digital functional verification and FPGA verification Job Requirements Bachelor/Masters in Electronics/Electrical Engineering with Mixed Signal IC design/verification experience. At least 7-10 Year(s) of working experience in application/ validation Fluent in Verilog/VHDL programming languages. Strong understanding of digital design principles, including HDLs, FPGAs, and ASICs. Experience with EDA tools such as Synopsys VCS, Cadence Genus, Mentor Graphics QuestaSim, or equivalent. Familiarity with scripting languages like Python, Perl, or Tcl. Ability to work in a fast-paced environment and prioritize tasks effectively. Strong communication and teamwork skills. Job Benefits Competitive salary package Comprehensive benefits package including health insurance, retirement plan, and paid time off Opportunities for professional growth and development

Required skills

problem solving python perl fpgas digital design tcl static timing analysis eda tools asics junior engineers synopsys vcs cadence genus mentor graphics questasim hdls rtl-level function verification digital synthesis place-and-route design for test fpga verification bachelor/masters in electronics/electrical engineering mixed signal ic design/verification experience verilog/vhdl programming languages digital design principles

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