Senior/Principal RTL Design for Complex SoC

Job description

Proxelera is hiring genius who will be working with us for cutting edge projects Role: Own complete RTL design for complex SoC or major subsystem blocks—from micro-architecture to tape out and silicon bring-up. Responsibilities: Define micro-architecture and develop high-quality synthesizable System Verilog/Verilog RTL. Lead design brings-up, integration, and close timing/power/area with synthesis and PnR teams. Run design reviews, fix bugs, and support silicon validation and post-silicon debug…

Required skills

validation synthesis soc debug verilog system verilog rtl silicon pnr

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