Tessolve
8 months ago
Senior Design Verification Engineer
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Company information
- Company
- Tessolve
- Location
- India India
- Posted
- 8 months ago
Job description
Job Title: Senior Design Verification Engineer – IP/SoC/Processor/GLS Experience: 5 to 30Years Location: [Insert Location – e.g., Bangalore / Hyderabad / Chennai / Noida ] Company: Tessolve Semiconductor Job Type: Full-Time | Permanent Domain: Semiconductor – Design Verification Job Summary: Tessolve is hiring experienced Design Verification Engineers with a strong background in IP and SoC-level verification , along with specialization in one or more of the following areas: processor/microarchitecture, instruction set architecture, memory hierarchy, cache coherence protocols, pipelining, branch prediction, register renaming, out-of-order execution, speculative execution, exception handling, interrupt handling, context switching, thread management, synchronization primitives, concurrent programming, parallel processing, distributed systems, cloud computing, big data analytics, machine learning, deep learning, natural language processing, computer vision, robotics, autonomous vehicles, IoT, AI, ML, DL, NLP, CV, RV, AV, IoT.
Required skills
- ai
- nlp
- machine learning
- iot
- cloud computing
- big data analytics
- ml
- deep learning
- natural language processing
- distributed systems
- robotics
- ip
- computer vision
- cv
- av
- soc
- processor
- semiconductor
- parallel processing
- exception handling
- rv
- autonomous vehicles
- design verification
- dl
- concurrent programming
- context switching
- gls
- microarchitecture
- instruction set architecture
- memory hierarchy
- cache coherence protocols
- pipelining
- branch prediction
- register renaming
- out-of-order execution
- speculative execution
- interrupt handling
- thread management
- synchronization primitives
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