L&T Technology Services
4 months ago
RTL Design Lead
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Company information
- Company
- L&T Technology Services
- Location
- India, Karnataka, Bangalore India
- Posted
- 4 months ago
Job description
Below is the JD for RTL engineers. We need to build strong RTL team.
- Minimum 8+ years of work experience in ASIC RTL Design, Synthesis, STA & FV
- Experience in Logic design/micro-architecture/RTL coding is a must.
- Must have hands on experience with design and integration of complex multi clock domain blocks
- Experience in Verilog/System-Verilog is a must.
- Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architecture
- Hands on experience in Multi Clock designs, Asynchronous interface is a must.
- Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.
- Work closely with the Design verification and validation teams for pre/post Silicon debug
- Hands on experience in Low power design is preferable
- Experience in Synthesis / Understanding of timing concepts for ASIC is must
Required skills
- validation
- synthesis
- verilog
- primetime
- sta
- cdc
- axi
- design verification
- reset
- lint
- low power design
- apb
- system-verilog
- micro-architecture
- logic design
- rtl coding
- fv
- ahb
- asic rtl design
- multi clock domain
- amba protocols
- clocking
- debug architecture
- multi clock designs
- asynchronous interface
- design compiler
- silicon debug
- timing concepts
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