Principal IC Modeling Engineer – CMOS / FPGA Fabric Modeling

We’re expanding our Architecture & Modeling team at Lattice and are open to strong IC modeling talent across seniority levels. If you have experience in CMOS/transistor-level modeling, FPGA fabric behavior, or PPA/architecture correlation, I’d love to connect. Lattice Semiconductor is looking for an IC Modeling Engineer to join our FPGA Architecture & Design organization. This role involves transistor-level CMOS modeling, FPGA fabric behavior modeling, performance analysis, and architecture correlation, and will be responsible for developing and maintaining accurate and detailed models of CMOS and FPGA fabrics, as well as analyzing and optimizing the performance of these models. The ideal candidate will have a strong background in IC modeling, with experience in transistor-level CMOS modeling, FPGA fabric behavior, or PPA/architecture correlation. Additionally, the candidate should have a solid understanding of digital design and verification, as well as experience with programming languages such as Python, C++, or MATLAB. The ability to work effectively in a team environment and communicate complex technical information to both technical and non-technical stakeholders is also essential. Lattice Semiconductor offers a competitive compensation package, including a comprehensive benefits program, and opportunities for professional growth and development. If you are a motivated and talented IC Modeling Engineer looking for a new challenge, please apply today! Lattice Semiconductor is an equal opportunity employer and welcomes applications from diverse candidates.