Hardware Engineer

Omniamus S.R.L. (Ploiești) is submitting a European-funded research and development project in September 2026, for the design and validation of an AI inference coprocessor that runs locally, at low power consumption.

We are looking for 2 engineers for the technical team of the project.

READ THIS BEFORE ANYTHING ELSE

We are not hiring now. The project proposal is due on September 30, 2026, the evaluation will take several months, and contracting is estimated for the first half of 2027.

Hiring will only take place then.

What we ask of you now are two things, and that's it:

1. Your CV

2. a one-page declaration by which you agree to be nominated in the funding application

We are not asking you to resign from your current job. We are not asking for exclusivity. If the project does not receive funding, nothing will happen and you will owe nothing.

We are telling you this upfront because it's true, and because we prefer to lose candidates now whom we would lose anyway in three months.

SALARY

€2,457 net per month for full-time employment — €4,200 gross, which is €25/hour according to the official salary scale of the funding program.

For reference: BestJobs' comparison tool shows for "hardware engineer, Bucharest" a net salary of €1,540–€1,700/month. The offer is approximately 45% above the top of that range.

This is not a figure we made up. It is the cap from the official annex of the program, applied to a full-time position.

Project duration: 24 months.

WHAT ELSE YOU GET

A share of the company's profit. 10% of the profit is distributed among all employees, proportional to their salary. Profit is measured before reinvestment. Money from funding and investments is not considered profit, because it is funding, not revenue. The company will deliberately operate at a loss in order to grow, so a year without profit is the plan, not a broken promise. We are telling you this now, not in a year.

Training on the design tools purchased for the project, budgeted separately.

Flexible hours, remote work.

A workstation sized for synthesis, not an office laptop.

WHAT YOU WILL DO

- RTL implementation of the compute core and memory subsystem

- functional verification, with measured coverage

- synthesis, placement, and routing on a high-capacity FPGA platform

- power and performance characterization, measured on real silicon

- integration with the software stack developed in parallel

This is not maintenance and not support. A new architecture will be designed, RTL will be written from scratch, and the result will be measured.

WHAT WE ARE LOOKING FOR

Mandatory:

- higher technical education: electronics, microelectronics, computers, automation

- minimum 2 years of experience in the field — we prefer 5 years or more

- demonstrable practical experience in at least one of the following:

Verilog / SystemVerilog or VHDL; functional verification (UVM or equivalent);

FPGA development flow (Vivado, Quartus); compute architecture

Advantageous: experience with compute accelerators, high-performance synthesis, timing analysis, power consumption measurements.

This is not suitable for you if your experience is exclusively in software development, without a hardware component. We filter based on documented experience in digital design — this is a requirement of the funding program, not our preference.

LOCATION

Remote. Travel for working on equipment is occasional — a board cannot be debugged via video.

WHAT TO SEND NOW

- Your CV

- a sentence about which part of the list interests you the most

- years of experience in digital design

If your profile matches, we will send you the extended technical description of the project and the availability declaration.