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Design Verification Engineer
Job description
ACL Digital is Hiring: GPM Subsystem Verification Engineer Must-have: UVM, System Verilog, IP Verification Preferred: Power Management IP, Firmware DV, Python/Perl Full-cycle DV: test plan → tape out Collaborate with top DV, design & architecture teams Apply/Refer: [email protected] ACLDigital HiringNow DesignVerification UVM SystemVerilog PowerManagementIP HyderabadJobs VLSICareers
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Company information
- Company
- ACL Digital
- Location
-
India, Telangana, Hyderabad
India - Posted
- 9 months ago
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